Silicon Labs /SiM3_NRND /SIM3L168_A /SARADC_0 /CONFIG

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Interpret as CONFIG

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (UPPER_ONLY)PACKMD 0 (DISABLED)SCANEN 0 (ONCE)SCANMD 0 (DISABLED)DMAEN 0 (LPOSC0)BCLKSEL 0CLKDIV0 (DISABLED)SCCIEN 0 (DISABLED)SDIEN 0 (DISABLED)FORIEN 0 (DISABLED)FURIEN

BCLKSEL=LPOSC0, FURIEN=DISABLED, DMAEN=DISABLED, PACKMD=UPPER_ONLY, SDIEN=DISABLED, FORIEN=DISABLED, SCANMD=ONCE, SCANEN=DISABLED, SCCIEN=DISABLED

Description

Module Configuration

Fields

PACKMD

Output Packing Mode.

0 (UPPER_ONLY): Data is written to the upper half-word and the lower half-word is filled with 0’s. An SCI interrupt is triggered when data is written, if enabled.

1 (LOWER_ONLY): Data is written to the lower half-word, and the upper half-word is filled with 0’s. An SCI interrupt is triggered when data is written, if enabled.

2 (UPPER_FIRST): Two data words are packed into the register with the upper half-word representing the earlier data, and the lower half-word representing the later data. The ADC write to the lower half-word will trigger the SCI interrupt, if enabled.

3 (LOWER_FIRST): Two data words are packed into the register with the lower half-word representing the earlier data, and the upper half-word representing the later data. The ADC write to the upper half-word will trigger the SCI interrupt, if enabled.

SCANEN

Scan Mode Enable.

0 (DISABLED): Disable ADC scan mode.

1 (ENABLED): Enable ADC scan mode. The ADC will scan through the defined time slots in sequence on every start of conversion.

SCANMD

Scan Mode Select.

0 (ONCE): The channel sequencer will cycle through all of the specified time slots once.

1 (LOOP): The channel sequencer will cycle through all of the specified time slots in a loop until SCANEN is cleared to 0.

DMAEN

DMA Interface Enable .

0 (DISABLED): Disable the ADC module DMA interface.

1 (ENABLED): Enable the ADC module DMA interface.

BCLKSEL

Burst Mode Clock Select.

0 (LPOSC0): Burst mode uses the Low Power Oscillator.

1 (APB): Burst mode uses the APB clock.

CLKDIV

SAR Clock Divider.

SCCIEN

Single Conversion Complete Interrupt Enable.

0 (DISABLED): Disable the ADC single data conversion complete interrupt.

1 (ENABLED): Enable the ADC single data conversion complete interrupt.

SDIEN

Scan Done Interrupt Enable.

0 (DISABLED): Disable the ADC scan complete interrupt.

1 (ENABLED): Enable the ADC scan complete interrupt.

FORIEN

FIFO Overrun Interrupt Enable.

0 (DISABLED): Disable the data FIFO overrun interrupt.

1 (ENABLED): Enable the data FIFO overrun interrupt.

FURIEN

FIFO Underrun Interrupt Enable.

0 (DISABLED): Disable the data FIFO underrun interrupt.

1 (ENABLED): Enable the data FIFO underrun interrupt.

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